The Acer TravelMate P645, built on the robust Compal LA-B731P (A4DBH) motherboard, is a high-end business ultrabook that demands precise chip-level diagnostic skills. As a technician, working on this platform requires a deep understanding of Compal’s power sequence and the specific requirements of the Intel Haswell/Broadwell ULT (Ultra-Low Voltage) architecture. This board features a soldered CPU and often suffers from power-delivery issues in the DC-IN protection stage or corruption in the ENE KB9012 embedded controller firmware.
Board Architecture & Technical Specifications
| Specification | Details |
|---|---|
| Motherboard Model / ODM Part Number | Compal LA-B731P R0.4 (A4DBH) |
| Target Laptop Series / Form Factor | Acer TravelMate P645-M / P645-S (Ultrabook) |
| Chipset / CPU Architecture | Intel Core i5/i7 4th or 5th Gen (SoC / BGA) |
| Super I/O (EC/KBC) Controller | ENE KB9012QF-A4 (Internal Flash) |
| Key Voltage Rails & Switching Coils | +3VALW (PL402), +5VALW (PL404), +1.35V_DDR (PL501), +VCC_CORE (PL702/PL703) |
Real-World Motherboard Diagnostic Procedures
1) Input Power Stage & DC-IN Protection Circuit
The LA-B731P utilizes the BQ24735 (PU301) charging IC to manage the entry of +19V into the system. If the laptop is completely dead with no lights, first check for 19V at the current sense resistor PR302. If voltage is missing here, verify the gate voltage of the dual N-Channel MOSFETs PQ301 and PQ302. The ACDRV (Pin 4) should be approximately 25V to fully open these gates. If ACDRV is 0V, check ACDET (Pin 6), which must be around 2.6V via the PR303/PR307 voltage divider. A short on the +19VB rail (B+) will often cause the charging IC to shut down ACDRV for protection.
2) Standby & Secondary Rails Generation
This Compal board generates the Always-On rails using the SY8208BQNC (+3VALW) and SY8208CQNC (+5VALW) buck converters at PU401 and PU402.
- Resistance Check: Measure resistance to ground on PL402. A reading below 100 ohms often indicates a partially shorted PCH (SoC).
- Enable Signals: These controllers require EN1/EN2 signals from the EC. If the coils are not producing voltage, verify that 3.3V_EN_R and 5V_EN_R are being pulled high by the ENE KB9012 after the EC receives its own VCC.
3) Power-On Sequence & Signal State Tracking
For "No Trigger" or "Power On, No Display" faults on the LA-B731P, track the following sequence using your oscilloscope or multimeter:
- EC Wake: Ensure +3V_EC is present and EC_RST# is high.
- Power Button: Check ON/OFFBTN# at Pin 114 of the KB9012; it should drop to 0V when pressed and return to 3.3V.
- PCH Communication: The EC must release PCH_RSMRST# (3.3V) to tell the SoC that standby power is stable. If the SoC does not respond by pulling PM_SLP_S3# high, the secondary rails (+1.35VS, +1.05VS) will never activate.
- BIOS/ME: In many cases, the P645 fails to post due to a corrupted ME Region in the SPI Flash (U5) or a corrupted internal flash in the KB9012. Re-flashing with a verified clean dump is a standard step for this model.
Download Schematic & Boardview Files
Direct download link. Verified schematic / boardview archive.
Professional Repair Assistance
Explore our technician resources:
- 🛠️ Diagnose No-Power & Short-Circuit faults step-by-step: Interactive Laptop Diagnostic Lab
- 🛒 Original Replacement Motherboards & IC Components: Official Spare Parts Mega Store
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