Monday, November 9, 2026

Acer Aspire 5338 5738 (Wistron JV50-MV) Schematic & Boardview: Chip-Level Repair Guide for Montevina Platform

The Acer Aspire 5338 and 5738 series are built on the venerable Wistron JV50-MV (Montevina) motherboard architecture. This platform, featuring the Intel Cantiga GM45/PM45 Northbridge and ICH9M Southbridge, is a classic study in laptop engineering. For chip-level technicians, this board is most famous (or infamous) for the NEC/TOKIN OE128/OE907 decoupling capacitor failure under the CPU socket, which causes intermittent freezing and power-cycling. Understanding the Wistron power-up sequence is critical for reviving these legacy workhorses.

Board Architecture & Technical Specifications

FeatureDetails
Motherboard Model / ODM Part NumberWistron JV50-MV (08245-1 / 48.4CG01.011)
Target Laptop Series / Form FactorAcer Aspire 5338, 5738, 5738G, 5738Z (15.6")
Chipset / CPU ArchitectureIntel Penryn (Socket P) + GM45/PM45 + ICH9-M
Super I/O (EC/KBC) ControllerENE KB926QF-D3
Key Voltage Rails & Switching CoilsDCBATOUT, 3D3V_AUX_S5 (L31), 5V_AUX_S5 (L32), 1D05V_VTT (L27)

Real-World Motherboard Diagnostic Procedures

1) Input Power Stage & DC-IN Protection Circuit

In the Wistron JV50-MV, the main system rail is labeled DCBATOUT. The entry point starts at the DC jack (CN21), passing through the protection MOSFETs U21 and U22 (typically AO4407 or SI4483). These are P-Channel MOSFETs controlled by the ISL6251 charging IC. Check for 19V at the source of U21. If ACIN (pin 2 of ISL6251) is above 3.2V, the IC should pull the gate low to 8V-9V to allow conduction. If the gate is at 19V, the MOSFETs are blocked; check for a short on DCBATOUT or a faulty PR1 current sense resistor.

2) Standby Power & Secondary Rails Generation

The Always-On rails 3D3V_AUX_S5 and 5V_AUX_S5 are generated by the TPS51427 (U55). Before the power button is pressed, the Super I/O (ENE KB926) must receive 3D3V_AUX_S5 on its VCC pins. Use your multimeter to check the resistance to ground on coils L31 and L32. A low resistance (<50 ohms) on L31 often indicates a shorted Super I/O or Southbridge. Ensure VREG3 and VREG5 (LDO outputs of U55) are present, as these are the first voltages required for the EC to wake up and start the handshake with the Southbridge.

3) Power-On Sequence & NEC/TOKIN Stability

The JV50-MV follows a strict sequence: KBC_PWRBTN# (triggered by the power button) → PM_SLP_S4# and PM_SLP_S3# (released by the ICH9M). Once these signals go high, the secondary rails like 1.8V (DDR2) and 1.05V (VTT) are enabled. A critical failure point for the 5738 model is the NEC/TOKIN OE128/OE907 capacitor on the VCC_CORE rail. If the laptop powers on but crashes under load or when the charger is plugged in, replace this capacitor with 4x 330uF Tantalum capacitors (low ESR) to stabilize the CPU ripple voltage. If the board has no Vcore, check VR_ON at the ISL6262 (U52).

Download Schematic & Boardview Files

📥 Download ASPIRE 5338-5738 Schematic / Boardview

Direct download link. Verified schematic / boardview archive for Wistron JV50-MV.

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