The Acer Aspire 2920, built on the Wistron Calado platform, represents the peak of the 12.1-inch ultra-portable era powered by the Intel Santa Rosa Refresh architecture. As a senior engineer, diagnosing these boards requires an understanding of the transition from legacy Northbridge/Southbridge configurations to more integrated power management. The Calado motherboard is notorious for specific aging issues, particularly in the DC-IN protection circuit and the thermal management of the Intel GM965 chipset.
Board Architecture & Technical Specifications
| Feature | Specification |
|---|---|
| Motherboard Model / ODM | Wistron Calado (48.4V401.011) |
| Target Laptop Series | Acer Aspire 2920 / 2920Z |
| Chipset / CPU Architecture | Intel GM965 + ICH8-M / Socket P (Core 2 Duo) |
| Super I/O (EC) Controller | ENE KB926QF B1 |
| Key Voltage Rails | DCBATOUT, 3D3V_AUX_S5, 5V_AUX_S5, 1D8V_S3, 1D05V_VTT |
Real-World Motherboard Diagnostic Procedures
1) Input Power Stage & DC-IN Protection Circuit
In the Wistron Calado architecture, the main system rail is labeled DCBATOUT. If the laptop is dead with no LEDs, start at the DC jack and trace through the first and second protection MOSFETs (typically Si4407 or similar). The gate control for these FETs is managed by the ISL6251 Charging IC. Check for ACIN (approx. 3.2V) at the IC to ensure the adapter is recognized. If the gates are not being pulled low (for P-Channel) or high (for N-Channel depending on revision), check the current sensing resistors (R0201/R2401) for any drift in value which can trigger a false over-current protection state.
2) Standby & Secondary Rails Generation
The Calado board utilizes a dedicated PWM controller (often the TPS51120) to generate the 3D3V_AUX_S5 and 5V_AUX_S5 rails. These must be present before the power button is pressed. If the 3.3V rail is missing, measure the resistance on the L8 and L9 coils. A low resistance (<50 ohms) on the 3.3V rail often points to a shorted ICH8-M Southbridge or a leaky decoupling capacitor near the Mini-PCIe slot. For the 1D8V_S3 (DDR2 RAM rail), ensure the feedback loop is intact, as a failure here will result in a 3-blink diagnostic code or a continuous reboot loop.
3) Power-On Sequence & Signal State Tracking
When the power button is pressed, the KBC_PWRBTN# signal is pulled low and sent to the ENE KB926 EC. The EC then releases PM_SLP_S4# and PM_SLP_S3# to the chipset. If the board triggers but immediately shuts down, use an oscilloscope to check the 32.768kHz crystal (Y3) near the Southbridge. Without this clock, the RTC section cannot handshake with the EC. Furthermore, if the ALL_SYS_PWRGD signal does not reach 3.3V, the CPU PWM (ISL6262) will not initialize the VCC_CORE rail. Always verify the BIOS (U20) integrity; a corrupted ME region or a failing EEPROM chip is a common cause for "Fan Spin, No Display" on this legacy platform.
Download Schematic & Boardview Files
Direct download link. Verified schematic / boardview archive.
Professional Repair Assistance
Explore our technician resources:
- 🛠️ Diagnose No-Power & Short-Circuit faults step-by-step: Interactive Laptop Diagnostic Lab
- 🛒 Original Replacement Motherboards & IC Components: Official Spare Parts Mega Store
