Monday, November 9, 2026

COMPAL LA-3481P (JAL90) Schematic & Boardview Download + Intel 965G Chipset Diagnostic Guide

The COMPAL LA-3481P (also known by its internal code JAL90) is a quintessential example of the Intel Santa Rosa platform that dominated the high-performance consumer laptop market during the Core 2 Duo era. Architected around the Intel 965GM/PM Northbridge and the ICH8M Southbridge, this board is a staple for repair technicians due to its presence in the legendary Acer Aspire 5920 series. Understanding the power-up sequence of this board requires a deep dive into the ENE KB926 Super I/O logic and the specific buck converter topologies used for the DDR2 and Core 2 Duo voltage rails.

Board Architecture & Technical Specifications

Feature Specification
Motherboard Model / ODM Part Number Compal LA-3481P (JAL90)
Target Laptop Series / Form Factor Acer Aspire 5920 / 5920G (15.4" Multimedia)
Chipset / CPU Architecture Intel 965PM/GM + ICH8M / Socket P Core 2 Duo
Super I/O (EC/KBC) Controller ENE KB926 B1
Key Voltage Rails & Switching Coils +3VALW (PL6), +5VALW (PL7), +1.8V (PL9), +VCC_CORE (PL10/PL11)

Real-World Motherboard Diagnostic Procedures

1. Input Power Stage & DC-IN Protection Logic

On the LA-3481P, the 19V rail (B+) is managed by the ISL6251 charging IC (PU1). If the laptop is completely dead, first check the voltage at PR3 (the main current sense resistor). If 19V is missing here, inspect the two P-Channel MOSFETs PQ1 and PQ2. The gate of these MOSFETs (PACIN signal) must be pulled low by the charging IC to allow the adapter voltage to pass through. A common failure is a shorted ceramic capacitor on the +19VB rail, which prevents the system from enabling the DC-IN path to protect the board.

2. Standby Rail Generation & LDO Stability

The +3VALW and +5VALW rails are generated by the MAX8744 (PU4) PWM controller. Before pressing the power button, verify +3VALW on PL6 and +5VALW on PL7. If these rails are missing, check the LDO output (pin 21 of PU4) which should provide a steady 5V (VCC). A common issue with this aging platform is the degradation of the filter capacitors on these coils. If you find a low resistance to ground (under 100 ohms) on PL6, the ENE KB926 Super I/O might be partially shorted, preventing the EC_ON signal from reaching the PWM controller.

3. Power-On Sequence & The NEC/TOKIN Failure

The LA-3481P follows the standard Compal power-up sequence: EC_ON > MAINON > SYSON > VRON. If the board triggers but shuts down immediately, or stays on with no display, focus on the +VCC_CORE rail. This board utilizes the infamous NEC/TOKIN OE128 (or OE907) proadlizer capacitor (located under the CPU socket). Over time, this capacitor loses its ESR rating, causing ripple in the CPU voltage that leads to instability or "black screen" faults. Replacing this single component with four 330uF tantalum capacitors is a standard "bulletproof" repair for this specific model.

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📥 Download COMPAL LA3481P 965G KB926 Schematic / Boardview

Direct download link. Verified schematic / boardview archive for JAL90 motherboard.

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ACER PREDATOR 15 (G9-591G) P5NCN_P7NCN R1.0 Schematic & Boardview Download + Chip-Level Diagnostic Guide

The Acer Predator 15 (G9-591G), built on the Compal P5NCN/P7NCN motherboard architecture, is a high-performance gaming machine that demands a robust power delivery system to support its Intel Skylake-H CPU and NVIDIA GTX 900M series GPU. As a senior engineer, I frequently see these boards in the lab with thermal-related power failures or high-side MOSFET breakdowns in the VGA core section. This guide provides the technical roadmap for diagnosing this specific Compal-designed PCB.

Board Architecture & Technical Specifications

FeatureSpecification / Component
Motherboard Model / ODMP5NCN_P7NCN R1.0 (Compal)
Target Laptop SeriesAcer Predator 15 G9-591G / G9-592G
Chipset / CPU ArchitectureIntel HM170 PCH / Skylake Core i7-6700HQ
Super I/O (EC) ControllerITE IT8587E (Compal Interfaced)
Charging ICTI BQ24780S (Hybrid Power Boost)
Key Voltage Rails+19VB, +3VALW, +5VALW, +1.2V_DDR4, +VCC_CORE, +VGA_CORE

Real-World Motherboard Diagnostic Procedures

1) Input Power Stage & DC-IN Protection Circuit

The P5NCN board uses a BQ24780S (PU301) charging controller. If the laptop is completely dead with no lights, first verify the 19V rail at PR302 (current sense resistor). If 19V is missing, check the gates of the dual N-channel isolation MOSFETs PQ302 and PQ303. For these to conduct, the BQ24780S must output approximately 25V on the ACDRV (Pin 4). This requires ACDET (Pin 6) to be between 2.4V and 2.8V, derived from a resistor divider off the DC-IN jack. If ACDRV is low, check for a short to ground on the main B+ rail (+19VB) before replacing the controller.

2) Standby Rail Generation & EC Initialization

Unlike older boards with a single 3V/5V combo IC, this Compal design often utilizes discrete buck converters. Locate PU401 (+3VALW) and PU402 (+5VALW). For these rails to activate, the ITE IT8587E must be powered (VCC on pin 11/33/96/125) and the EC_ON signal must be high. If +3VALW is present but the laptop won't trigger, check the 32.768kHz crystal (Y2) and the RSMRST# signal. In the Predator series, the EC also manages the dual-fan PWM logic; a failure in the thermal sensing circuit (U55/U56) can sometimes prevent the S0 state transition as a safety measure.

3) GPU (+VGA_CORE) & Power-On Sequence Analysis

Gaming-specific failures on the P5NCN often involve the GTX GPU power phases. Measure the resistance to ground on PL1101, PL1102, and PL1103. A healthy Maxwell/Pascal GPU should show 0.8Ω to 2.5Ω depending on the chip variant. If you find 0Ω, the high-side MOSFETs (e.g., PQ1102) are likely shorted, potentially sending 19V directly into the GPU core. Always verify the ALL_SYS_PWRGD signal at the EC before assuming a CPU/GPU fault; this signal confirms that all secondary rails (+1.0V_VCCST, +1.2V_DDR, +1.05V_PCH) are stable.

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📥 Download ACER PREDATOR 15 (G9-591G) P5NCN_P7NCN R1.0 Schematic / Boardview

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Sunday, November 8, 2026

Acer Aspire ES1-431 (Quanta Z8AD) Schematic & Boardview Download + Chip-Level Repair Guide

The Acer Aspire ES1-431, built on the Quanta Z8AD (DA0Z8ADB4E0 / DAZ8ADMB6D0) platform, represents a common entry-level architecture utilizing the Intel Braswell System-on-Chip (SoC). For the chip-level technician, this board is a classic example of high integration where the CPU, PCH, and Graphics are merged into a single BGA package. This design makes power rail sequencing and thermal management critical, as a failure in any sub-block often requires a full SoC replacement. In this guide, we will break down the Quanta-specific power logic and common failure points found on this specific revision.

Board Architecture & Technical Specifications

FeatureSpecification / Component
Motherboard ModelQuanta Z8AD (DA0Z8ADB4E0 / RC-2)
Platform ArchitectureIntel Braswell (Celeron N3050 / Pentium N3700)
Super I/O (EC)ENE KB9022Q D
Charging ControllerTI BQ24735RGRR (PU6)
Primary Voltage Rails+3VPCU (PL8), +5VPCU (PL9), +1.0V_SoC (PL11)

Real-World Motherboard Diagnostic Procedures

1. DC-IN Isolation & ACDRV Gate Control

On the Quanta Z8AD, the input power stage begins at the DC jack (PJ1) and flows through the first protection MOSFETs PQ28 and PQ30. The BQ24735 (PU6) acts as the gatekeeper. If the board is completely dead with 0.00A draw:

  • Check VA (Adapter Voltage) at the drain of PQ28.
  • Measure ACDET (Pin 6) of PU6; it must be approximately 2.6V (derived from a resistor divider from VA). If this is missing, the IC will not enable the charging circuit.
  • Verify REGN (Pin 16) outputs 6V. If REGN is present but ACDRV (Pin 4) is not outputting ~25V to open the N-channel MOSFETs, check for a short circuit on the VIN rail (the main system bus after the current sense resistor PR125).

2. Standby Rail Generation & EC Handshake

This board utilizes the RT8243A (PU8) to generate the Always-On rails. In Quanta terminology, these are +3VPCU and +5VPCU. Unlike older platforms, the Intel Braswell SoC requires very specific sequencing:

  • Check PL8 (+3VPCU) and PL9 (+5VPCU). If these are missing, check the EN signals (ENTRIP1/ENTRIP2) coming from the EC (ENE KB9022).
  • On this model, the power button is often integrated into the keyboard matrix. Measure NBSWON# at the keyboard connector Pin 27. It should sit at 3.3V and drop to 0V when the button is pressed.
  • If the EC receives NBSWON# but does not release S5_ON, the BIOS (U22) firmware may be corrupted, or the EC itself may lack its internal 128KB firmware (KB9022 is programmable).

3. Power-On Sequence & SoC Reset States

Once S5_ON is high, the board transitions to the S0 state. For the Intel Braswell SoC to initialize, several secondary rails must be present:

  • Verify +1.0V_SoC (PL11) and +1.8V_AUX. The 1.8V rail is critical for Braswell platforms; without it, the SoC will not release RSMRST#.
  • Using an oscilloscope, check for activity on the SPI Flash (U22) Pin 1 (CS#) immediately after the power button is pressed. No pulse indicates the SoC is not attempting to read the BIOS.
  • If all rails are present (+3V, +5V, +1.0V, +1.8V, +VCC_CORE) but there is no display, check the PLT_RST# signal. If reset is held low, the SoC likely has a localized short or a cracked BGA solder ball due to the thin chassis flex common in the ES1-431 series.

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📥 Download ACER ASPIRE ES1-431 DA0Z8ADB4E0 DAZ8ADMB6D0 QUANTA Z8AD RC-2 Schematic / Boardview

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ACER ASPIRE E5-572 Z5WAW LA-B702P R10 Schematic & Boardview Download + Chip-Level Diagnostic Guide

The Acer Aspire E5-572, built on the Compal Z5WAW LA-B702P motherboard architecture, represents one of the final iterations of the high-performance Intel Haswell/Broadwell-M platform. Unlike its thinner 'U-series' counterparts, the LA-B702P often features a socketed or high-TDP processor and dedicated NVIDIA graphics (N15S-GT/N15V-GM), requiring a robust power delivery system. For chip-level technicians, this board is a classic Compal design, utilizing the ENE KB9012 programmable EC and a multi-rail standby system that is prone to specific sequence failures.

Board Architecture & Technical Specifications

Specification Details
Motherboard Model / ODM Part Number Compal Z5WAW LA-B702P Revision 1.0
Target Laptop Series / Form Factor Acer Aspire E5-572 / E5-572G (15.6")
Chipset / CPU Architecture Intel Haswell (4th Gen) + HM86/HM87 PCH
Super I/O (EC/KBC) Controller ENE KB9012QF-A4 (Internal Flash)
Key Voltage Rails & Switching Coils +19VB, +3VALW (PL402), +5VALW (PL403), +1.35V_DDR3L (PL501)

Real-World Motherboard Diagnostic Procedures

1) DC-IN Protection & Charging Circuit Analysis

On the LA-B702P, the input stage relies on the TI BQ24735 (PU301) charging IC. If the laptop is dead with 19V present at the DC jack but 0V at the main rail (B+), check the gate voltage of the two P-Channel entry MOSFETs (PQ301 & PQ302). For these to conduct, the BQ24735 must output ~25V on ACDRV (Pin 4). If ACDRV is 0V, verify ACDET (Pin 6) is approximately 2.6V via the PR303/PR307 resistor divider. A common fault involves a shorted ceramic capacitor on the +19VB line, causing the IC to enter protection mode and shut down the input gates.

2) Standby Rail Logic & Resistance Norms

This board uses independent PWM controllers for the Always-On rails: PU401 (SY8208B) for +3VALW and PU402 (SY8208C) for +5VALW. Before replacing ICs, measure the resistance to ground on PL402 and PL403. A low resistance (<50 ohms) on PL402 usually indicates a punctured PCH or a shorted ENE KB9012 EC chip. If the rails are missing but no short is found, ensure EN (Enable) signals from the charging IC or the EC are reaching the chips. Note that +3VALW is required to power the EC's internal flash before the power button can even be sensed.

3) Power-On Sequence & Signal State Tracking

When the power button is pressed, the EC (KB9012) pulls KBC_PWRBTN# low and then sends PCH_PWRBTN# to the PCH. To diagnose a "trigger but no display" or "no trigger" scenario, use an oscilloscope to check the 32.768kHz crystal (Y2) and the SPI communication on the BIOS chip (U22). Crucially, the LA-B702P requires the RSMRST# (Resume Reset) signal to be 3.3V before the PCH will release the PM_SLP_S3# and PM_SLP_S4# sleep signals. If the board spins the fan for 3 seconds and dies, it is often an Intel ME (Management Engine) corruption in the BIOS or a failure of the +VCC_CORE rail (PU1101) to signal VR_READY.

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📥 Download ACER ASPIRE E5-572 Z5WAW LA-B702P R10 Schematic / Boardview

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Acer Aspire ES1-520 ES1-521 ES1-522 B5W1E LA-D121P R10 Schematic & Boardview: Chip-Level Repair Guide

The Acer Aspire ES1 series, specifically the B5W1E LA-D121P motherboard, represents a common AMD-based architecture (Beema/Mullins SoC) found in budget-friendly yet durable laptops. As a senior engineer at geniusmind4u.blogspot.com, I’ve seen this board frequently on the bench. It utilizes a Compal design, which is highly logical for troubleshooting if you understand the sequence of the +3VALW and +5VALW rails and the critical role of the ENE Super I/O in the power-up phase.

Board Architecture & Technical Specifications

FeatureDetails / Component
Motherboard Model / ODM Part NumberCompal LA-D121P (B5W1E) Rev: 1.0
Target Laptop SeriesAcer Aspire ES1-520, ES1-521, ES1-522
Chipset / CPU ArchitectureAMD Beema / Mullins SoC (Integrated CPU/GPU/PCH)
Super I/O (EC/KBC) ControllerENE KB9022Q C (Programmable)
Key Voltage Rails & Switching CoilsPL302 (B+), PL401 (+3VALW), PL402 (+5VALW), PL601 (+1.1VALW)

Real-World Motherboard Diagnostic Procedures

1) Input Power Stage & DC-IN Protection Circuit

The LA-D121P uses the PU301 (BQ24735RGRR) charging IC to manage the entry of the 19V rail. If you have a "No Power" symptom with 0A draw on the DC Power Supply, begin by checking PR302 (the current sense resistor). You must verify ACDET (Pin 6) is at approximately 2.6V via the voltage divider from the adapter. If ACDET is present but ACDRV (Pin 4) is not outputting ~25V to drive the gates of the twin N-Channel MOSFETs PQ301 and PQ302, check for a short on the +19VB (B+) rail. A common failure point on this board is a ceramic decoupling capacitor shorting to ground near the SoC VCORE area.

2) Standby & Secondary Rails Generation

Unlike some modern platforms, the LA-D121P generates +3VALW and +5VALW using discrete buck converters (often SY8208B and SY8208C chips at PU401 and PU402). Before pressing the power button, PL401 must show 3.3V and PL402 must show 5V. If these are missing, check the ENLDO and ENTRIP signals. Note that on this AMD platform, the +1.1VALW (on PL601) is also a critical standby rail required for the SoC's internal power management unit. If PL601 shows a resistance lower than 10-15 ohms, the SoC itself is likely internally shorted, a common death blow for the ES1-521 series.

3) Power-On Sequence & Signal State Tracking

If standby rails are present, the ENE KB9022 (U31) takes control. Ensure the EC has 3.3V on VCC pins and the 32.768kHz crystal (Y2) is oscillating. Upon pressing the power button, the EC should pull KBC_PWRBTN# high then low, and subsequently release RSMRST# (Resume Reset) to the AMD SoC. If the SoC does not respond by pulling PM_SLP_S3# and PM_SLP_S4# high, the sequence is stalled. In many cases on the LA-D121P, this is caused by a corrupted 128KB internal EC firmware or a corrupted Main BIOS (U6). Always perform a "Clean ME/TXE" (or the AMD equivalent BIOS cleaning) and ensure the EC is properly flashed before condemning the SoC.

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Acer One 14 Z1402 (Wistron Woody 14276-1) Schematic & Boardview Download + Chip-Level Diagnostic Guide

The Acer One 14 Z1402 is a staple of the budget computing segment, built upon the Wistron Woody (14276-1) motherboard architecture. This platform typically features Intel Braswell or Bay Trail-M SoC (System-on-Chip) designs, where the CPU, GPU, and PCH are integrated into a single package. For the chip-level technician, this means precise voltage regulation is critical, as any spike on the secondary rails can directly kill the primary SoC. In this guide, we break down the Wistron power-up sequence and provide the essential engineering files for successful motherboard recovery.

Board Architecture & Technical Specifications

Feature Specification / Component
Motherboard Model / ODM Wistron Woody 14 (14276-1 / 14276-2)
Chipset / CPU Architecture Intel Braswell SoC (e.g., Celeron N3050 / Pentium N3700)
Super I/O (EC/KBC) ITE IT8587E / IT8987E
Charging IC Texas Instruments BQ24735RGRR
Main Power Rails DCBATOUT, 3D3V_AUX_S5, 5V_AUX_S5, 1D35V_S3, 1D05V_VCCST

Real-World Motherboard Diagnostic Procedures

1. DC-IN Protection & DCBATOUT Generation

On the Wistron Woody platform, the first point of failure is often the input MOSFETs (PU4401/PU4402). If the laptop is completely dead with no lights, measure DCBATOUT at the current sense resistor PR4417. If you see 0V, check the BQ24735 Charging IC. Pin 20 (VCC) must have 19V, and Pin 6 (ACDET) should be approximately 2.6V via the resistor divider. Crucially, check Pin 4 (ACDRV); it should be ~25V to drive the N-channel gates. If ACDRV is low, check for a short-circuit on the main rail (DCBATOUT) by measuring resistance to ground at PR4417; a reading below 10 ohms indicates a shorted decoupling capacitor or high-side MOSFET.

2. Standby Rail Analysis (3.3V/5V Buck Converter)

The 3D3V_AUX_S5 and 5V_AUX_S5 rails are generated by the PWM controller (commonly TPS51225 or similar). Before checking the coils (PL4501/PL4502), verify the LDO outputs: VREG3 and VREG5. These are essential for the EC (ITE IT8587E) to wake up. In the Acer Z1402, a common failure is the 3.3V rail being pulled down by a faulty SoC or a leaky ceramic capacitor near the Wi-Fi slot. Resistance to ground on the 3.3V coil should be in the kilo-ohm range. If it's below 50 ohms, the SoC is likely damaged.

3. Power-On Sequence & Signal State Tracking

To diagnose a "No Power-On" state where standby voltages are present, monitor the following Wistron-specific signals in order:

  • KBC_PWRBTN#: Should drop to 0V when the power button is pressed and return to 3.3V.
  • PM_SLP_S4# / PM_SLP_S3#: These signals must be released by the Intel SoC. If these remain at 0V after the button press, the SoC is not receiving the RSMRST# signal or the BIOS (U12) firmware is corrupted.
  • ALL_SYS_PWRGD: This signal combines the "Power Good" status from all secondary regulators. If this is missing, the CPU VCORE will never initialize. Always verify the 1.05V VCCST rail before condemning the SoC.

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📥 Download ACER ONE 14 Z1402 Schematic / Boardview

Direct download link. Verified Wistron Woody 14276-1 schematic archive.

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ACER TravelMate P645 A4DBH LA-B731P Schematic & Boardview Download + Chip-Level Diagnostic Guide

The Acer TravelMate P645, built on the robust Compal LA-B731P (A4DBH) motherboard, is a high-end business ultrabook that demands precise chip-level diagnostic skills. As a technician, working on this platform requires a deep understanding of Compal’s power sequence and the specific requirements of the Intel Haswell/Broadwell ULT (Ultra-Low Voltage) architecture. This board features a soldered CPU and often suffers from power-delivery issues in the DC-IN protection stage or corruption in the ENE KB9012 embedded controller firmware.

Board Architecture & Technical Specifications

Specification Details
Motherboard Model / ODM Part Number Compal LA-B731P R0.4 (A4DBH)
Target Laptop Series / Form Factor Acer TravelMate P645-M / P645-S (Ultrabook)
Chipset / CPU Architecture Intel Core i5/i7 4th or 5th Gen (SoC / BGA)
Super I/O (EC/KBC) Controller ENE KB9012QF-A4 (Internal Flash)
Key Voltage Rails & Switching Coils +3VALW (PL402), +5VALW (PL404), +1.35V_DDR (PL501), +VCC_CORE (PL702/PL703)

Real-World Motherboard Diagnostic Procedures

1) Input Power Stage & DC-IN Protection Circuit

The LA-B731P utilizes the BQ24735 (PU301) charging IC to manage the entry of +19V into the system. If the laptop is completely dead with no lights, first check for 19V at the current sense resistor PR302. If voltage is missing here, verify the gate voltage of the dual N-Channel MOSFETs PQ301 and PQ302. The ACDRV (Pin 4) should be approximately 25V to fully open these gates. If ACDRV is 0V, check ACDET (Pin 6), which must be around 2.6V via the PR303/PR307 voltage divider. A short on the +19VB rail (B+) will often cause the charging IC to shut down ACDRV for protection.

2) Standby & Secondary Rails Generation

This Compal board generates the Always-On rails using the SY8208BQNC (+3VALW) and SY8208CQNC (+5VALW) buck converters at PU401 and PU402.

  • Resistance Check: Measure resistance to ground on PL402. A reading below 100 ohms often indicates a partially shorted PCH (SoC).
  • Enable Signals: These controllers require EN1/EN2 signals from the EC. If the coils are not producing voltage, verify that 3.3V_EN_R and 5V_EN_R are being pulled high by the ENE KB9012 after the EC receives its own VCC.

3) Power-On Sequence & Signal State Tracking

For "No Trigger" or "Power On, No Display" faults on the LA-B731P, track the following sequence using your oscilloscope or multimeter:

  1. EC Wake: Ensure +3V_EC is present and EC_RST# is high.
  2. Power Button: Check ON/OFFBTN# at Pin 114 of the KB9012; it should drop to 0V when pressed and return to 3.3V.
  3. PCH Communication: The EC must release PCH_RSMRST# (3.3V) to tell the SoC that standby power is stable. If the SoC does not respond by pulling PM_SLP_S3# high, the secondary rails (+1.35VS, +1.05VS) will never activate.
  4. BIOS/ME: In many cases, the P645 fails to post due to a corrupted ME Region in the SPI Flash (U5) or a corrupted internal flash in the KB9012. Re-flashing with a verified clean dump is a standard step for this model.

Download Schematic & Boardview Files

📥 Download ACER TM P645 A4DBH LA-B731P R0.4 0925 Schematic / Boardview

Direct download link. Verified schematic / boardview archive.

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